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IQIQM Quantum Computers logo

IQM Quantum Computers

Espoo, FI

FPGA Design Engineer.

ENGINEERING

At IQM, we build world-leading quantum computers for the well-being of humankind. We design systems to tackle computational challenges beyond the practical limits of classical machines. Our work sits at the edge of science and engineering. It's complex, demanding, and deeply collaborative. We turn deep research into reliable, full-stack systems that drive discoveries in fields like medicine, energy, and technology, reshaping how the world computes.

Join the team that gives quantum a heartbeat.

The work

As an FPGA Engineer, you will design and develop FPGA logic for high-speed data processing and communication between QCS subsystems and external interfaces, working within the tight timing constraints of quantum systems.

You will join IQM’s Scalable Electronics team, collaborating with FPGA developers, hardware and software engineers, physicists, and quantum error correction experts to build the electronics that enable scalable and reliable quantum computers.

What you’ll actually do
  • Design, implement, simulate, and benchmark FPGA IP blocks in VHDL.

  • Integrate FPGA IP blocks to form a complete design.

  • Plan and evaluate different solutions with the team.

  • Benchmark and optimize data throughput, latency, and FPGA resource requirements.

  • Align interfaces, protocols, and documentation with software, firmware, and hardware stakeholders

  • Do bidirectional knowledge sharing with domain experts and help keeping tooling and ways of working healthy.

What we're looking for
  • Experience designing FPGA IP blocks in HDL and validating designs through simulation

  • At least 1 year of experience in a professional engineering environment

  • BSc/MSc in electrical engineering, computer science, computer engineering or similar, or equivalent practical experience

  • Comfortable working across disciplines and contributing in a collaborative, low hierarchy setup

  • Proficient VHDL skills and experience with high-performance FPGA families and modern toolchains

  • Fluent with digital logic fundamentals such as clock domain concepts and safe transfers

Nice to have skills:

  • Experience with Intel/Altera FPGAs and Quartus software.

  • Verification mindset and practices where correctness matters early.

  • Knowledge on high-speed communication protocols and hardware to software interfaces.

  • Scripting skills for automating tool flows and developing continuous integration (CI) flow.

  • Hands-on experience of lab measurements with oscilloscope and spectrum analyzer.

  • Profiling, benchmarking, and optimizing real time systems for performance.

Why IQM?
  • Full-stack quantum computing: From quantum hardware to software layers and beyond, we build across the full-stack.

  • High-performance playground: We aim high, and we know sustainable performance only works when life outside work does too—hybrid setups, flexible hours.

  • Never the smartest: Expect to learn constantly. You won't always be the smartest person in the room, and that's the point.

  • Approachable leadership: Flat hierarchy, direct access. Feel free to approach any leaders. They're friendlier than they look!

  • The sweet spot: Big enough to matter. Small enough to move fast. Growing between a startup and a corporation. We’re in the phase where top performers get noticed.

  • Bigger than IQM: Our people build know-how for the entire quantum ecosystem. We publish papers, run hackathons, and help shape a market that's still being defined.

The future of computing won’t build itself. You might be one of the few who do.

  • Meet our people and learn more about IQM on our stories page.

  • Explore our scientific publications.

We'll start interviews and move forward with hiring as soon as we meet strong candidates. Please submit your application soon.

600M€+ Total Funding | 400+ Team Members | 30+ Quantum Computers Built | 300+ Patents Filed | 10 Location Globally

Pay
Not stated
Where
Espoo, FI
Work
Not stated
Type
Not stated
Posted
6 Aug, 2026
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