Log inSign up free
  • Home
  • Jobs
    • Applications
    • Career
    • Resume
    • Cover letters
  • Content
    • Posts
    • Media
  • Messages
  • Analytics
    • Overview
    • Pages
  • Builder
    • Templates
  • More tools
    • Profile
    • Hiring
  • Settings
All jobs
INIntel logo

Intel

USA - CA - Santa Clara, United States of America

SoC Logic Design Engineer.

ENGINEERING$105.7K–149.2K/YR
Job Details: Job Description: As a SoC Logic Design Engineer, you will actively contribute to the development, coding, and simulation of system-on-chip (SoC) designs. You will integrate logic from various IP blocks and subsystems into a complete chip design, ensuring power, performance, area, and timing goals are met. Your work will directly impact the delivery of cutting-edge, high-quality SoC solutions that drive advancements in technology and innovation. The role is part of Intel's Data Center Group (DCG), which focuses on delivering advanced solutions that enable data-centric computing for global industries. As a member of this organization, you will collaborate on projects that shape the performance, security, and efficiency of Intel's data center offerings, contributing to the broader infrastructure required for modern computing needs. The primary responsibilities for this role will include, but are not limited to: Design and implement logic for SoC blocks and subsystems using register transfer level (RTL) coding techniques. Integrate IP blocks and subsystems into full chip SoC designs, ensuring seamless functionality. Conduct quality checks across various aspects of logic design, from RTL coding to timing, power, and area convergence. Optimize logic designs to meet power, performance, area, and timing targets. Review verification plans and resolve failing RTL tests to ensure correctness of design features. - Collaborate with IP providers to integrate and validate IPs for SoC-level designs. Follow secure development practices to meet security objectives and address security threats in designs. Drive compliance with quality assurance standards for successful IP and SoC handoff. Qualifications: Minimum Qualifications: Minimum qualifications are required to be initially considered for this position. Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, with 0-1 years of hands-on experience in logic design gained through internships, academic projects, coursework, or hands-on training OR a Master's degree in Electrical Engineering, Computer Engineering, or related field with no prior professional experience. Advanced experience in register transfer level (RTL) coding languages such as Verilog or VHDL. Basic knowledge with industry-standard tools for logic design, synthesis, and simulation (e.g., Synopsys Design Compiler, Cadence Xcelium). Basic knowledge of power, performance, and area optimization in SoC designs. Basic knowledge of timing analysis and static timing tools. Preferred Qualifications: Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Strong analytical and problem-solving skills with attention to detail. Effective communication skills to collaborate with cross-functional teams. Experience working on academic or industry projects involving SoC design and IP integration. Passion for learning and contributing to advancements in semiconductor technology. If you are eager to build a career in cutting-edge SoC design and want to be part of a collaborative, innovative, and dynamic environment, we encourage you to apply and join Intel in shaping the future of technology. Job Type: College Grad Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom, US, Oregon, Hillsboro Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. Intel’s official careers website. Find your next job and take on projects that shape tomorrow’s technology. Benefits Internships Life at Intel Locations Recruitment Process
Pay
$105.7k–149.2k/yr
Where
USA - CA - Santa Clara, United States of America
Work
Not stated
Type
Not stated
Posted
9 Nov, 2026
Apply on the original postingSign in to apply

Verified board

more at Intel.

6 Nov, 2026

Intel

Software Performance Engineer

INIntel logo
  • Engineering

$111k–181.9k/yr

USA +1

Details
6 Nov, 2026

Intel

Technical Lab Operations Manager

INIntel logo
  • People & Ops

$155.5k–255.2k/yr

USA +1

Details
6 Nov, 2026

Intel

Microarchitecture and Design Engineer - AI SoC

INIntel logo
  • Data & ML

$105.7k–172.9k/yr

USA - CA - Santa Clara, United States of America

Details

similar roles.

10 Nov, 2026

Arrow

Project Lead / Technical Lead – Safety-Critical Embedded Systems (eInfochips)

ARArrow logo
  • Senior level
  • Engineering

EG-Cairo, Egypt (Maadi Technology Park)

Salary not listed

Details
10 Nov, 2026

Arrow

Senior Embedded Model-based Developer - Control Law (eInfochips)

ARArrow logo
  • Senior level
  • Engineering

EG-Cairo, Egypt (Maadi Technology Park)

Salary not listed

Details
10 Nov, 2026

Renesas Electronics

Principal Quality Control Engineer

RERenesas Electronics logo
  • Full time
  • Staff level
  • Engineering

Seoul, kr

Full time

Details
10 Nov, 2026

Renesas Electronics

Hardware Engineer

RERenesas Electronics logo
  • Full time
  • Engineering

Bayan Lepas, my

Full time

Details