Location: Rowland, CA Position Summary: The Wafer Fab Process Technician serves as a key production and technical leader whose primary responsibility is running volume production in support of daily wafer fabrication schedules, while also ensuring process stability, recipe control, and yield performance across InP photonic device lines, specifically InP Buried Heterostructure (BH) DFB lasers and BH Gain Chips (GC). The majority of this role’s hands-on time is spent operating the thin film and etch modules (PECVD dielectric deposition systems, ICP/RIE dry etch systems, and wet etch benches) to keep volume production lots moving on schedule, including the dielectric mask, Mesa etch, and surface preparation steps that support MOCVD epitaxial regrowth of InP current-blocking layers used to form the buried heterostructure, as well as dielectric passivation of the finished device. Operating with minimal supervision in a III-V cleanroom environment, the Technician plays a vital role in meeting fab throughput targets, leading root-cause investigations for process excursions, maintaining strict Process-of-Record (POR) discipline, and mentoring junior technicians and operators to support reliable, high-yield, high-volume manufacturing. Responsibilities: PECVD, Dry Etch & Wet Etch Production Operations (50%): Serve as the primary production technician for the PECVD, dry etch, and wet etch modules, keeping InP BH DFB laser and BH GC wafer lots moving through volume production on schedule Operate PECVD systems to deposit SiO2 and SiNx dielectric films used as etch/regrowth masks and passivation layers, maintaining film thickness, refractive index, uniformity, and stress within specification for every lot Operate ICP/RIE dry etch systems for dielectric mask patterning and InP/InGaAsP Mesa etch steps that directly support MOCVD epitaxial regrowth for buried heterostructure formation; control etch rate, selectivity, sidewall profile, and etch depth Execute wet etch and wet bench steps, including stripe etch, BOE oxide removal, resist strip, and pre-regrowth surface cleans, and maintain bench chemistry through scheduled bath changes and concentration checks Perform chamber cleans, seasoning, and scheduled preventive maintenance tasks on PECVD and dry etch tools, and qualify chambers with monitor wafers (particle, rate, and uniformity) prior to returning tools to production Prioritize and sequence hot lots, engineering wafers, and standard production lots across the deposition and etch bays to sustain high tool utilization and meet daily/weekly throughput targets Perform in-line film thickness, refractive index, etch depth, and defect inspection and first-wafer/first-lot qualification checks prior to releasing lots downstream Troubleshoot routine PECVD, dry etch, and wet bench tool and process issues in real time to minimize downtime and protect production schedule adherence Advanced Process Troubleshooting & Root Cause (20%): Lead root-cause investigation for process excursions and drift across assigned process modules (e.g., PECVD film thickness or stress non-uniformity, dry etch rate or profile drift, particle adders, wet etch undercut variation) Design and run targeted process checks (short-loop wafers, engineering splits) to isolate root cause Partner with Process Engineering and Equipment Engineering on corrective action design and verification Process Control & SPC Ownership (20%): Own SPC control charts and control-limit reviews for assigned process area, including PECVD film thickness, refractive index, and stress, dry etch rate and depth, and wet etch rate metrics Own and maintain process recipes and POR documentation for assigned process area, with emphasis on PECVD deposition recipes and dry etch recipes Evaluate and implement engineering-approved recipe changes; verify post-change process stability Support qualification of new or modified process steps DOE, Qualification & Training Support (10%): Support execution of DOEs, process qualifications, and NPI process runs Train and mentor Operators on PECVD, dry etch, and wet etch production operation, process control methods, and troubleshooting technique Minimum Qualifications: Associate degree in electronics, chemistry, materials science, or related technical field preferred; equivalent experience considered 5 - 10 years of experience in semiconductor/photonics wafer processing, with direct III-V/InP process experience Direct, hands-on experience operating PECVD and plasma dry etch (ICP/RIE) systems in a high-volume production environment strongly preferred Hands-on wet etch and wet bench experience on III-V materials and dielectrics preferred Strong working knowledge of PECVD dielectric deposition (SiO2, SiNx), plasma dry etch, wet etch, and in-line fab process steps Hands-on proficiency operating deposition, etch, and metrology tools (ellipsometer/reflectometer, profilometer, SEM, defect inspection) in a volume production setting Working knowledge of plasma etch behavior (rate, selectivity, profile, polymer and chamber conditioning effects) and of dielectric film properties and stress Ability to independently lead complex processes of troubleshooting and root-cause investigations Demonstrated ability to sustain lot throughput and cycle-time targets in a high-volume deposition and etch production area Strong ownership mentality and independent judgment Effective communication with operators, technicians, and process and equipment engineers Ability to mentor and train junior staff Ability to work in a cleanroom environment for extended periods across multiple process bays, including sustained time in the PECVD and dry etch bays to support volume production pace Ability to work around chemicals (acids, solvents) and process gases with proper safety procedures May require flexibility to support engineering runs or excursions outside standard shift hours The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job-related tasks other than those specifically included in this description. All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities. A reasonable estimate of the pay range for this position is $25 – $36. There are several factors taken into consideration in determining base salary, including but not limited to: job-required qualifications, skills, education and experience, as well as job location and the value of other elements of an employee’s total compensation package. Semtech Corporation (Nasdaq: SMTC) is a high-performance semiconductor, IoT systems and Cloud connectivity service provider dedicated to delivering high quality technology solutions that enable a smarter, more connected and sustainable planet. Our global teams are dedicated to empowering solution architects and application developers to develop breakthrough products for the infrastructure, industrial and consumer markets. To learn more about Semtech technology, visit us at Semtech.com or follow us on LinkedIn or Twitter.

Wafer Fab Technician – PECVD, Dry Etch & Wet Etch.

more at semtech.

Wafer Fab Technician – Metallization, Dry Etch & Wet Etch

Wafer Fab Technician – Photolithography & Wet Etch

Wafer Fab Supervisor

similar roles.

Channel Strategic Planning

STC-Staff, STC-เจ้าหน้าที่บริการงานบุคคลและงานสนับสนุน

Busser

Market Table Attendant