As an NVM Circuit Design Engineer, you’ll play a critical role in pushing the boundaries of ultra-low-power non-volatile memory (NVM) technology. This is a high-impact position where you will provide technical leadership and drive the architecture and design of next-generation NVM solutions used across Cirrus Logic’s product portfolio.
From concept to silicon, you’ll own the development of cutting-edge NVM IP—balancing power, performance, and area to meet the demands of increasingly sophisticated systems.
Responsibilities:
- Architect and design embedded Non-Volatile Memory (NVM) solutions, including high-performance pre-decoders, drivers, and critical support circuitry
- Define and implement advanced low-power operating modes and power domains to meet aggressive energy targets
- Lead and drive internal NVM design reviews, ensuring quality, robustness, and technical excellence
- Partner with test and validation teams to develop comprehensive validation and silicon characterization strategies for NVM macros
- Collaborate cross-functionally with design, silicon technology, and marketing teams to shape optimized, product-aligned NVM solutions
- Work closely with internal silicon technology experts to analyze, debug, and optimize NVM performance across process nodes
- Coordinate with PDK teams to establish and refine NVM integration requirements and deliverables
- Collaborate with design and verification engineers to seamlessly integrate and validate hard IP within system-level designs
- Engage with library teams to define, develop, and release accurate memory views and models enabling efficient design integration and simulation
Required Skills and Qualifications:
- MS or PhD in Electrical Engineering with proven hands-on experience in Non-Volatile Memory (NVM) design
- Strong proficiency with Cadence design tools, including schematic capture, simulation, and layout
- Demonstrated track record of innovation, with contributions to new IP development and patented technologies
- Deep experience in design-for-manufacturability (DFM) and design-for-test (DFT) methodologies for NVM
- Proven ability to collaborate effectively with external foundries across development cycles
- Excellent verbal and written communication skills, with the ability to clearly convey complex technical concepts
Preferred Skills & Experience
- Experience with emerging NVM technologies (e.g., MRAM, RRAM) is highly desirable; familiarity with SRAM design is also a plus
- Hands-on experience with NVM test chip design, bring-up, and silicon characterization